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DAC39RF10 Datasheet(PDF) 173 Page - Texas Instruments |
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DAC39RF10 Datasheet(HTML) 173 Page - Texas Instruments |
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173 / 232 page ![]() Figure 8-66. TRUNC_HLSB Register (continued) RESERVED TRUNC_HLSB R/W-00h R/W-0b Table 8-68. TRUNC_HLSB Register Field Descriptions Bit Field Type Reset Description 7-1 R/W 0h 0 TRUNC_HLSB R/W 0b adds ½ LSB offset for < 16-bit resolution modes or devices. For a mode or device with < 16-bit output resolution, setting this bit adds a 1/2 LSB offset to reduce the average offset introduced by truncation. Note: This register should only be changed when DP_EN=0 8.65 TX_EN_SEL Register (Offset = 02F8h) [reset = 03h] TX_EN_SEL is shown in Figure 8-67 and described in Table 8-69. Return to the Register Summary Table. Transmitter Enable Control Selection. Figure 8-67. TX_EN_SEL Register 7 6 5 4 3 2 1 0 RESERVED QUIET_TX_DIS ABLE FAST_TX_EN USE_TX_EN1 USE_TX_EN0 R/W-0h R/W-0b R/W-0b R/W-1b R/W-1b Table 8-69. TX_EN_SEL Register Field Descriptions Bit Field Type Reset Description 7-4 RESERVED R/W 0h 3 QUIET_TX_DISABLE R/W 0b 0: Transmission is disabled after DEM and dither by sending a static aging safe code. For some configurations and frequencies, the outputs will have higher noise than a static mid-scale code would normally have. However, this mode has the lowest latency from transmit enable to DAC output. 1: When transmission is disabled, the input to DEM and dither is muted to minimize the output noise. This increases the latency from transmit enable to DAC output by 56 DAC clocks Note: This bit may only be set when FAST_TX_EN=1. 2 FAST_TX_EN R/W 0b 0: When the transmit enables are both low, JESD and datapath clocks are shutdown to save power. When transmission is re- enabled the outputs remain muted until valid data is available at the output. 1: No power saving is performed and transmit enables can be used independently. Latency from transmit enable to DAC outputs is reduced in this mode. 1 USE_TX_EN1 R/W 1b 0: DACB is controlled by the TXEN1 ball. In this mode, TX_EN1 register is ignored. 1: DACB is controlled by the TX_EN1 register. In this mode the TXEN1 ball input does not affect the transmit enable for DACB. Note: USE_TX_EN1 and USE_TX_EN0 should be programmed to the same value (individual channel control is not supported). www.ti.com DAC39RF10-SP, DAC39RF10-SEP DAC39RFS10-SP, DAC39RFS10-SEP SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 173 Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP |
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