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DAC39RF10 Datasheet(PDF) 170 Page - Texas Instruments

Part # DAC39RF10
Description  DAC39RFx10-SP DAC39RFx10-SEP 10.4 or 20.8GSPS, 16-bit, Dual and Single Channel, Multi-Nyquist Digital-to-Analog Converter (DAC) with JESD204C Interface
PDF  232 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC39RF10 Datasheet(HTML) 170 Page - Texas Instruments

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Table 8-63. DUC_L Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
3-0
DUC_L
R/W
0h
DUC Interpolation Factor
0: 1x
1: 2x
2: 3x
3: 4x
4: 6x
5: 8x
6: 12x
7: 16x
8: 24x
9: 32x
10: 48x
11: 64x
12: 96x
13: 128x
14: 192x
15: 256x
Note: This register should only be changed when JESD_EN=0 and
DP_EN=0.
8.60 DUC_GAIN Register (Offset = 02E2h) [reset = 00h]
DUC_GAIN is shown in Figure 8-62 and described in Table 8-64.
Return to the Register Summary Table.
Figure 8-62. DUC_GAIN Register
7
6
5
4
3
2
1
0
DUC_GAIN3
DUC_GAIN2
DUC_GAIN1
DUC_GAIN0
R/W-00b
R/W-00b
R/W-00b
R/W-00b
Table 8-64. DUC_GAIN Register Field Descriptions
Bit
Field
Type
Reset
Description
7-6
DUC_GAIN3
R/W
00b
DUC_GAINn adjusts the gain of DUCn (in the channel bonder)
0: 0dB
1: -6dB
2: -12dB
3: RESERVED
Note: When the DUCs are configured for complex output
(DUC_FORMAT=1), DUC2 and DUC3 cannot be used. In that case,
DUC_GAIN2 and DUC_GAIN3 adjust the gain of the imaginary
outputs of DUC0 and DUC1 respectively.
Note: This register should only be changed when DP_EN=0.
5-4
DUC_GAIN2
R/W
00b
3-2
DUC_GAIN1
R/W
00b
1-0
DUC_GAIN0
R/W
00b
8.61 DUC_FORMAT Register (Offset = 02E3h) [reset = 00h]
DUC_FORMAT is shown in Figure 8-63 and described in Table 8-65.
Return to the Register Summary Table.
DUC Output Format
DAC39RF10-SP, DAC39RF10-SEP
DAC39RFS10-SP, DAC39RFS10-SEP
SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026
www.ti.com
170
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Copyright © 2026 Texas Instruments Incorporated
Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP



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