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DAC39RF10 Datasheet(PDF) 168 Page - Texas Instruments

Part # DAC39RF10
Description  DAC39RFx10-SP DAC39RFx10-SEP 10.4 or 20.8GSPS, 16-bit, Dual and Single Channel, Multi-Nyquist Digital-to-Analog Converter (DAC) with JESD204C Interface
PDF  232 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC39RF10 Datasheet(HTML) 168 Page - Texas Instruments

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Table 8-58. JESD_RST Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
0
JESD_RST
R/W
0b
When set, this bit holds the digital portion of the JESD circuitry in
reset but does not affect the physical lane. It may be necessary to
set this bit prior to setting JESD_EN = 1 and then clear this bit at a
later time to start processing the JESD data. This allows the supply
to settle from the large change in power that occurs when starting
the PHY and JESD clocks. This is especially important if the user
plans to use the LANE_ARR values, since these values are captured
only the first time the elastic buffer attempts to release.
8.56 EXTREF_EN Register (Offset = 02B0h) [reset = 00h]
EXTREF_EN is shown in Figure 8-57 and described in Table 8-59.
Return to the Register Summary Table.
Enable External Reference
Figure 8-57. EXTREF_EN Register
7
6
5
4
3
2
1
0
RESERVED
EXTREF_EN
R/W-00h
R/W-0b
Table 8-59. EXTREF_EN Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
RESERVED
R/W
00h
0
EXTREF_EN
R/W
0b
Setting this bit enable the use of an external reference voltage on the
EXTREF ball.
CUR_2X_EN Register (Offset = 02B1h) [reset = 00h]
CUR_2X_EN is shown in Figure 8-58 and described in Table 8-60.
Return to the Register Summary Table.
DAC Current Doubler Enable
Figure 8-58. CUR_2X_EN Register
7
6
5
4
3
2
1
0
RESERVED
CUR_2X_EN
R/W-00h
R/W-0b
Table 8-60. CUR_2X_EN Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
RESERVED
R/W
00h
0
CUR_2X_EN
R/W
0b
Setting this bit doubles the DAC output current.
8.57 DAC_OFS_CHG_BLK Register (Offset = 02CFh) [reset = 00h]
DAC_OFS_CHG_BLK is shown in Figure 8-59 and described in Table 8-61.
Return to the Register Summary Table.
DAC Offset Adjustment Change Block
DAC39RF10-SP, DAC39RF10-SEP
DAC39RFS10-SP, DAC39RFS10-SEP
SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026
www.ti.com
168
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Copyright © 2026 Texas Instruments Incorporated
Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP



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