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DAC39RF10 Datasheet(PDF) 187 Page - Texas Instruments

Part # DAC39RF10
Description  DAC39RFx10-SP DAC39RFx10-SEP 10.4 or 20.8GSPS, 16-bit, Dual and Single Channel, Multi-Nyquist Digital-to-Analog Converter (DAC) with JESD204C Interface
PDF  232 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC39RF10 Datasheet(HTML) 187 Page - Texas Instruments

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Table 8-99. SYNC_STATUS Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
1
NCO_SYNC_DET
R/W1C
NA
This bit is set any time one or more NCOs receives a sync event.
Write a 1 to clear this bit.
0
SYSREF_DET
R/W1C
NA
This bit is set when a SYSREF is detected. Write a 1 to clear the bit
and allow it to be re-detected.
8.93 SYS_ALM Register (Offset = 0430h) [reset = NA, read/write 1 to clear]
SYS_ALM is shown in Figure 8-80 and described in Table 8-100.
Return to the Register Summary Table.
System Alarm Status
Figure 8-80. SYS_ALM Register
7
6
5
4
3
2
1
0
JESD_LINK_D
OWN_ALM
JTIMER_EXPIR
ED_ALM
JESD_CRC_AL
M
RESERVED
SYSRST_ALM
SYSREF_ALM
R/W1C
R/W1C
R/W1C
R
R/W1C
R/W1C
Table 8-100. SYS_ALM Register Field Descriptions
Bit
Field
Type
Reset
Description
7
JESD_LINK_DOWN_ALM R/W1C
This bit is set any time LINK_UP transitions from 1 to 0 while
JESD_EN=1. Write 1 to clear the alarm.
6
JTIMER_EXPIRED_ALM
R/W1C
This bit is set if the JESD link has been down (LINK_UP=0 while
JESD_EN=1) longer than allowed by JTIMER. Write 1 to clear the
alarm.
5
JESD_CRC_ALM
R/W1C
This bit is set any time CRC_FAULT is detected on an enabled lane.
Applies only to 64b/66b modes. Write 1 to clear the alarm.
4-2
RESERVED
R
1
SYSRST_ALM
R/W1C
This bit is set any time the chip is reset due to the RESET ball,
power on reset, or SOFT_RESET. Write 1 to clear the alarm.
0
SYSREF_ALM
R/W1C
This bit is set any time a SYSREF edge is detected at an incorrect
alignment by either the clock dividers or by the JESD Subsystem
(when JESD_EN=1). Write 1 to clear the alarm.
8.94 ALM_MASK Register (Offset = 0431h) [reset = 00h]
ALM_MASK is shown in Figure 8-81 and described in Table 8-101.
Return to the Register Summary Table.
Alarm Mask
Figure 8-81. ALM_MASK Register
7
6
5
4
3
2
1
0
JESD_LINK_D
OWN_MASK
JTIMER_EXPIR
ED_MASK
JESD_CRC_M
ASK
RESERVED
SYSREF_ALM_
MASK
R/W-0b
R/W-0b
R/W-0b
R/W-0h
R/W-0b
Table 8-101. ALM_MASK Register Field Descriptions
Bit
Field
Type
Reset
Description
7
JESD_LINK_DOWN_MAS
K
R/W
0h
When set, alarms from the JESD_LINK_DOWN_ALM register are
masked and will not impact the alarm output.
www.ti.com
DAC39RF10-SP, DAC39RF10-SEP
DAC39RFS10-SP, DAC39RFS10-SEP
SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP



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