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DAC39RF10 Datasheet(PDF) 124 Page - Texas Instruments

Part # DAC39RF10
Description  DAC39RFx10-SP DAC39RFx10-SEP 10.4 or 20.8GSPS, 16-bit, Dual and Single Channel, Multi-Nyquist Digital-to-Analog Converter (DAC) with JESD204C Interface
PDF  232 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC39RF10 Datasheet(HTML) 124 Page - Texas Instruments

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Table 7-20. JESD204C Link Parameters
Parameter
Description
ILAS Field Name
Value for this device(1)
ADJCNT
DAC LMFC adjustment
ADJCNT[3:0]
n/a
ADJDIR
DAC LMFC adjustment direction
ADJDIR[0]
n/a
BID
Bank ID
BID[3:0]
n/a
CF
Number of control words per frame
CF[4:0]
0
CS
Number. of control bits per sample
CS[1:0]
0
DID
Device identification number
DID[7:0]
n/a
F
Number of octets per frame (per lane)
F[7:0]
See Table 7-22
HD
High Density Format
HD[0]
See Table 7-22
JESDV
JESD204 Version
JESDV[2:0]
n/a
K
Number of frames per multiframe
K[7:0]
Set by KM1register
L
Number of lanes per link
L[4:0]
ceiling(M/Mx*Lx)
LID
Lane identification no.
LID[4:0]
n/a
M
Number of sample streams per link (see (1))
M[7:0]
Set by JESD_M register
N
Bits per sample (before adding control or tail bits) for JESD204C
interface.
N[4:0]
See Table 7-22
N'
Total number of bits per sample (including control and tail bits) for
JESD204C interface.
N’[4:0]
See Table 7-22
PHADJ
Phase adjustment request to DAC
PHADJ[0]
n/a
S
Number of samples per stream per frame
S[4:0]
See Table 7-22
SCR
Scrambling enabled
SCR[0]
Set by SCR register
SUBCLASSV
Device Subclass Version
SUBCLASSV[2:0]
n/a
RES1
Reserved field 1
RES1[7:0]
n/a
RES2
Reserved field 2
RES2[7:0]
n/a
CHKSUM
Checksum (sum of all above fields, modulo 256)
FCHK[7:0]
n/a
(1)
In 8b/10b modes, the transmitter may send link configuration octets during the ILAS. The values sent by the transmitter are not
checked by this receiver, and they do not need to match the operational values of the receiver.
Table 7-21. Link Parameters (applicable in 64b/66b encoding only)
Parameter
Description
Value for this device(1)
E
Number of multi-blocks per extended multi-block (64b/66b encoding only)
1
Each supported mode is assigned a mode number which can be programmed into the JMODE register with the
parameters listed in Table 7-22.
DAC39RF10-SP, DAC39RF10-SEP
DAC39RFS10-SP, DAC39RFS10-SEP
SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026
www.ti.com
124
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Copyright © 2026 Texas Instruments Incorporated
Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP



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