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DAC39RF10 Datasheet(PDF) 134 Page - Texas Instruments |
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DAC39RF10 Datasheet(HTML) 134 Page - Texas Instruments |
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134 / 232 page ![]() 7.5 Programming The device contains two programming interfaces: a SPI interface and a Fast Reconfiguration (FR) interface for fast programming of NCO frequency and phase. 7.5.1 Using the Standard SPI Interface The standard SPI interface is accessed using the following four pins: serial clock (SCLK), serial data in (SDI), serial data out (SDO), and serial interface chip-select ( SCS). Register access is enabled through the SCS pin. 7.5.1.1 SCS This signal must be asserted low to access a register through the serial interface. Setup and hold times with respect to the SCLK must be observed. 7.5.1.2 SCLK Serial data input is accepted at the rising edge of this signal. SCLK has no minimum frequency requirement. 7.5.1.3 SDI Each register access requires a specific 24-bit pattern at this input. This pattern consists of a read-and-write (R/W) bit, register address, and register value. The data are shifted in MSB first and multi-byte registers are always in little-endian format (least significant byte stored at the lowest address). Setup and hold times with respect to the SCLK must be observed (see the Switching Characteristics table). 7.5.1.4 SDO The SDO signal provides the output data requested by a read command. This output is high impedance during write bus cycles and during the read bit and register address portion of read bus cycles. 7.5.1.5 Serial Interface Protocol As shown in Figure 7-58, each register access consists of 24 bits. The first bit is high for a read and low for a write. The next 15 bits are the address of the register that is to be written to. During write operations, the last eight bits are the data written to the addressed register. During read operations, the last eight bits on SDI are ignored and, during this time, the SDO outputs the data from the addressed register. Figure 7-58 shows the serial protocol details. SCLK 1 24 Single Register Access SCS SDI Command Field Data Field SDO (read mode) Data Field High Z High Z 17 16 8 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 R/W Figure 7-58. Serial Interface Protocol: Single Read and Write DAC39RF10-SP, DAC39RF10-SEP DAC39RFS10-SP, DAC39RFS10-SEP SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026 www.ti.com 134 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP |
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