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DAC39RF10 Datasheet(PDF) 137 Page - Texas Instruments

Part # DAC39RF10
Description  DAC39RFx10-SP DAC39RFx10-SEP 10.4 or 20.8GSPS, 16-bit, Dual and Single Channel, Multi-Nyquist Digital-to-Analog Converter (DAC) with JESD204C Interface
PDF  232 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC39RF10 Datasheet(HTML) 137 Page - Texas Instruments

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8 SPI Register Map
Table 8-1 lists the SPI registers. All register offset addresses not listed in Table 8-1 should be considered as
reserved locations and the register contents should not be modified. Reserved register fields in addresses with
non-reserved R/W fields always return the default/reset value during read, not the written value.
Table 8-1. SPI Registers
Offset
Acronym
Register Name
Section
0x0000
CONFIG_A
Configuration A
Go
0x0002
DEVICE_CONFIG
Device Configuration
Go
0x0003
CHIP_TYPE
Chip Type
Go
0x0004
CHIP_ID
Chip Identification
Go
0x0006
CHIP_VERSION
Chip Version
Go
0x000C
VENDOR_ID
Vendor Identification
Go
0x0010-0x007F
RESERVED
0x0080
SYSREF_CTRL
SYSREF Control
Go
0x0081-0x008F
RESERVED
0x0090-0x0092
SYSREF_POS
SYSREF Capture Position
Go
0x0093-0x009F
RESERVED
0x00A0
SYSREF_ALIGN
SYSREF Alignment Control
Go
0x00A1
SYSREF_TERM
SYSREF Termination Configuration
Go
0x00A2-0x00FF
RESERVED
0x0100
JESD_EN
JESD204C Subsystem Enable
Go
0x0101
JMODE
JESD204C Mode
Go
0x0102
JESD_M
JESD204C Number of Streams
Go
0x0103
JCTRL
JESD204C Control
Go
0x0104
SHMODE
JESD204C Sync Word Mode
Go
0x0105
KM1
JESD204C K Parameter
Go
x0106
RBD
JESD204C Release Buffer Delay
Go
0x0107
JESD_STATUS
JESD204C System Status Register
Go
0x0108
REFDIV
JESD204C Reference Divider
Go
0x0109
MPY
JESD204C PLL Multiplier
Go
0x010A
RATE
JESD204C Receive Rate
Go
0x010B
LB_VRANGE
JESD204C VCO Range
Go
0x010C-0x011F
RESERVED
0x0120
JSYNC_N
JESD204C Manual Sync Request
Go
0x0121
JTEST
JESD204C Test Control
Go
0x0122-0x0123
RESERVED
RESERVED
0x0124
JTIMER
JESD204C Watchdog Timer
Go
0x0125-0x0126
RESERVED
0x0127
SYNC_EPW
JESD204C SYNC Error Report Pulse Width
Go
0x0128
CRC_TH
JESD204C CRC Error Thresholds
Go
0x0129-0x012B
RESERVED
0x012C
LANE_ARSTAT
Lane Arrival Status
Go
0x012D
RESERVED
0x012E-0x012F
LANE_INV
PHY Lane Inversion
Go
0x0130-0x013F
LANE_SEL[15:0]
PHY Lane Select for Logical Lane n
Go
0x0140-0x014F
LANE_ARR[15:0]
Lane n Arrival Time
Go
0x0150-0x015F
LANE_STATUS[15:0]
Lane n Status
Go
www.ti.com
DAC39RF10-SP, DAC39RF10-SEP
DAC39RFS10-SP, DAC39RFS10-SEP
SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP



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