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AD5172 Datasheet(PDF) 8 Page - Analog Devices

Part # AD5172
Description  256-Position, One-Time Programmable, Dual-Channel, I2C Digital Potentiometers
PDF  22 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5172 Datasheet(HTML) 8 Page - Analog Devices

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Data Sheet
AD5172/AD5173
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
analog.com
Rev. J | 8 of 22
Figure 4. AD5172 Pin Configuration
Table 5. AD5172 Pin Function Descriptions
Pin
No.
Mnemonic
Description
1
B1
B1 Terminal. GND ≤ VB1 ≤ VDD.
2
A1
A1 Terminal. GND ≤ VA1 ≤ VDD.
3
W2
W2 Terminal. GND ≤ VW2 ≤ VDD.
4
GND
Digital Ground.
5
VDD
Positive Power Supply. Specified for operation from 2.7
V to 5.5 V. For OTP programming, VDD needs to be a
minimum of 5.6 V but no more than 5.8 V and to be
capable of driving 100 mA.
6
SCL
Serial Clock Input. Positive-edge triggered. Requires a
pull-up resistor. If this pin is driven directly from a logic
controller without a pull-up resistor, ensure that the VIH
minimum is 0.7 V × VDD.
7
SDA
Serial Data Input/Output. Requires a pull-up resistor. If
this pin is driven directly from a logic controller without
a pull-up resistor, ensure that the VIH minimum is 0.7 V
× VDD.
8
A2
A2 Terminal. GND ≤ VA2 ≤ VDD.
9
B2
B2 Terminal. GND ≤ VB2 ≤ VDD.
10
W1
W1 Terminal. GND ≤ VW1 ≤ VDD.
Figure 5. AD5173 Pin Configuration
Table 6. AD5173 Pin Function Descriptions
Pin
No.
Mnemonic
Description
1
B1
B1 Terminal. GND ≤ VB1 ≤ VDD.
2
AD0
Programmable Address Bit 0 for Multiple Package
Decoding.
3
W2
W2 Terminal. GND ≤ VW2 ≤ VDD.
4
GND
Digital Ground.
5
VDD
Positive Power Supply. Specified for operation from 2.7
V to 5.5 V. For OTP programming, VDD needs to be a
minimum of 5.6 V but no more than 5.8 V and to be
capable of driving 100 mA.
6
SCL
Serial Clock Input. Positive-edge triggered. Requires a
pull-up resistor. If this pin is driven directly from a logic
controller without a pull-up resistor, ensure that the VIH
minimum is 0.7 V × VDD.
7
SDA
Serial Data Input/Output. Requires a pull-up resistor. If
this pin is driven directly from a logic controller without
a pull-up resistor, ensure that the VIH minimum is 0.7 V
× VDD.
8
AD1
Programmable Address Bit 1 for Multiple Package
Decoding.
9
B2
B2 Terminal. GND ≤ VB2 ≤ VDD.
10
W1
W1 Terminal. GND ≤ VW1 ≤ VDD.



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