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ADG1407 Datasheet(PDF) 18 Page - Analog Devices |
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ADG1407 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 20 page ![]() ADG1406/ADG1407 Rev. 0 | Page 18 of 20 TEST CIRCUITS IDS SD VS V Figure 27. On Resistance SD VS A A VD IS (OFF) ID (OFF) Figure 28. Off Leakage SD A VD ID (ON) NC NC = NO CONNECT Figure 29. On Leakage 3V 0V OUTPUT tr < 20ns tf < 20ns ADDRESS DRIVE (VIN) tTRANSITION tTRANSITION 50% 50% 90% 90% OUTPUT ADG14061 50Ω 300Ω GND S1 S2 TO S15 S16 D 35pF VIN 2.4V EN VDD VSS VDD VSS VS1 VS16 1SIMILAR CONNECTION FOR ADG1407. A0 A2 A1 A3 Figure 30. Address to Output Switching Times, tTRANSITION 3V 0V OUTPUT 80% 80% ADDRESS DRIVE (VIN) tBBM OUTPUT ADG14061 50Ω 300Ω GND S1 S2 TO S15 S16 D 35pF VIN 2.4V EN VDD VSS VDD VSS VS 1SIMILAR CONNECTION FOR ADG1407. A0 A2 A1 A3 Figure 31. Break-Before-Make Delay, tBBM 3V 0V OUTPUT 50% 50% tOFF (EN) tON (EN) 0.9VOUT 0.9VOUT ENABLE DRIVE (VIN) OUTPUT ADG14061 300Ω GND S1 S2 TO S16 D 35pF 50Ω VIN EN VDD VSS VDD VSS VS 1SIMILAR CONNECTION FOR ADG1407. A0 A2 A1 A3 Figure 32. Enable Delay, tON (EN), tOFF (EN) |
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