AT89C51IC2-SLSCM datasheet(80/146 Pages) ATMEL

80 / 146 page

AT89C51IC2

4301A–8051–01/04

Keyboard Interface

The AT89C51IC2 implements a keyboard interface allowing the connection of a

8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt capability on

both high or low level. These inputs are available as alternate function of P1 and allow to

exit from idle and power down modes.

The keyboard interface interfaces with the C51 core through 3 special function registers:

KBLS, the Keyboard Level Selection register (Table 63), KBE, The Keyboard interrupt

Enable register (Table 62), and KBF, the Keyboard Flag register (Table 61).

Interrupt

The keyboard inputs are considered as 8 independent interrupt sources sharing the

same interrupt vector. An interrupt enable bit (KBD in IEN1) allows global enable or dis-

able of the keyboard interrupt (see Figure 33). As detailed in Figure 34 each keyboard

input has the capability to detect a programmable level according to KBLS.x bit value.

Level detection is then reported in interrupt flags KBF.x that can be masked by software

using KBE.x bits.

This structure allow keyboard arrangement from 1 by n to 8 by n matrix and allow usage

of P1 inputs for other purpose.

Figure 33. Keyboard Interface Block Diagram

Figure 34. Keyboard Input Circuitry

Power Reduction Mode

P1 inputs allow exit from idle and power down modes as detailed in Section “Power

Management”, page 67.

P1:x

KBE.x

KBF.x

KBLS.x

Vcc

Internal Pullup

P1.0

Keyboard Interface

Interrupt Request

KBD

IEN1

Input Circuitry

P1.1

Input Circuitry

P1.2

Input Circuitry

P1.3

Input Circuitry

P1.4

Input Circuitry

P1.5

Input Circuitry

P1.6

Input Circuitry

P1.7

Input Circuitry

KBDIT

AT89C51IC2-SLSCM Datasheet(PDF) 80 Page - ATMEL Corporation

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