AT89C51IC2-SLSCM datasheet(25/146 Pages) ATMEL

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AT89C51IC2

4301A–8051–01/04

Dual Data Pointer

The additional data pointer can be used to speed up code execution and reduce code

size.

The dual DPTR structure is a way by which the chip will specify the address of an exter-

nal data memory location. There are two 16-bit DPTR registers that address the external

memory, and a single bit called DPS = AUXR1.0 (see Table 21) that allows the program

code to switch between them (Refer to Figure 7).

Figure 7. Use of Dual Pointer

Table 21. AUXR1 register

AUXR1- Auxiliary Register 1(0A2h)

Reset Value: XXXX XX0X0b

Not bit addressable

Note:

*Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.

External Data Memory

AUXR1(A2H)

DPS

DPH(83H) DPL(82H)

DPTR0

DPTR1

765

43210

ENBOOT

GF3

DPS

Bit

Number

Bit

Mnemonic

Description

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

5ENBOOT

Enable Boot Flash

Cleared to disable boot rom.

Set to map the boot rom between F800h - 0FFFFh.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

GF3

This bit is a general purpose user flag.*

Always cleared.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

0DPS

Data Pointer Selection

Cleared to select DPTR0.

Set to select DPTR1.

AT89C51IC2-SLSCM Datasheet(PDF) 25 Page - ATMEL Corporation

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