33742 datasheet(29/70 Pages) FREESCALE

29 / 70 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

33742

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

Table 7. Table of Operations

APPLICATION WAKE-UP FROM THE 33742

When the application is in Stop mode, it can be awakened

from the SBC side. When a wake-up condition is detected by

the SBC (for example, CAN, wake-up input), the 33742

enters the Normal Request mode and generates an interrupt

pulse at the INT pin.

APPLICATION WAKE-UP FROM THE MCU

When the device is in the Stop mode, a wake-up event

may come from the system MCU. In this case the MCU

selects the device the using a LOW-to-HIGH transition on the

33742 CS pin. Then the 33742S goes into Normal Request

mode and generates an interrupt pulse at the INT pin.

STOP MODE CURRENT MONITOR

If the VDD output current exceeds an internal set threshold

(IDDS-WU), the SBC automatically enters the Normal Request

mode and generates an interrupt at the INT pin. The interrupt

is a non-maskable and the INTR register will have no flag set.

INTERRUPT GENERATION WHEN WAKE-UP

FROM STOP MODE

When the SBC wakes from Stop mode, it first enters the

Normal Request mode before generating a 10

μs typical

pulse on the INT pin. These are non-maskable interrupts with

the wake-up event read through the SPI registers, the

CANWU bit in the CAN Register (CANR), or the LCTRx bit in

the Wake-up Register (WUR). In case of wake-up from Stop

Mode

Voltage Regulator

HS Switch

Wake-up

Capabilities

(if Enabled)

RST Pin

INT Pin

Watchdog

Software

CAN Cell

Normal

Request

VDD: ON,

V2: OFF,

HS: OFF

–

Low for tRSTDUR time,

then HIGH

–

Normal

VDD: ON,

V2: ON,

HS: Controllable

–

Normally HIGH.

Active LOW if WDOG

or VDD under-voltage

occurs

If enabled, signal

failure (VDD

Pre-warning

Temp, CAN, HS)

Running

TXD/RXD

Standby

VDD: ON,

V2: OFF,

HS: Controllable

–

Same as Normal

mode

Same as Normal

mode

Running

Low power

Stop

VDD: ON

(Limited Current

Capability),

V2: OFF,

HS:OFF or Cyclic Sense

CAN, SPI, L0:L3,

Cyclic Sense,

Forced Wake-up,

IDD Over-current(40)

Normally HIGH.

Active LOW if

WDOG(41)

or VDD under-voltage

occurs

Signal 33742S

wake-up and

IDD > IDDS-WU

(not maskable)

Running if

enabled.

Not running if

disabled

Low power.

Wake-up capability

if enabled

Sleep

VDD: OFF,

V2: OFF,

HS: OFF or Cyclic

CAN, SPI,

L0:L3, Cyclic Sense

Forced Wake-up

LOW

Not Active

Not running

Low power.

Wake-up capability

if enabled

Normal

Debug(39)

Same as Normal

–

Normally HIGH.

Active LOW if VDD

under-voltage occurs

Same as Normal

Not running

Same as Normal

Standby

Debug(39)

Same as Standby

–

Normally HIGH.

Active LOW if VDD

under-voltage occurs

Same as Standby Not running

Same as Standby

Stop

Debug(39)

Same as Stop

Normally HIGH.

Active LOW if VDD

under-voltage occurs

Same as Stop

Not running

Same as Stop

Flash

Programming

Forced externally

–

Not operating

Notes

39.

Mode entered via special sequence described under the heading Debug Mode: Hardware and Software Debug with the 33742,

beginning on page 34.

40.

IDD over-current always enabled.

41.

WDOG if enabled.

33742 Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

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