MCF52235 datasheet(22/54 Pages) FREESCALE

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MCF52235 ColdFire Microcontroller Data Sheet, Rev. 7

MCF52235 Family Configurations

Freescale Semiconductor

1.3

Reset Signals

Table 4 describes signals that are used to either reset the chip or as a reset indication.

1.4

PLL and Clock Signals

Table 5 describes signals that are used to support the on-chip clock generation circuitry.

1.5

Mode Selection

Table 6 describes signals used in mode selection, Table 6 describes particular clocking modes.

1.6

External Interrupt Signals

Table 7 describes the external interrupt signals.

Table 4. Reset Signals

Signal Name

Abbreviation

Function

I/O

Reset In

RSTI

Primary reset input to the device. Asserting RSTI immediately resets

the CPU and peripherals.

Reset Out

RSTO

Driven low for 512 CPU clocks after the reset source has deasserted.

Table 5. PLL and Clock Signals

Signal Name

Abbreviation

Function

I/O

External Clock In

EXTAL

Crystal oscillator or external clock input.

Crystal

XTAL

Crystal oscillator output.

Clock Out

CLKOUT

This output signal reflects the internal system clock.

Table 6. Mode Selection Signals

Signal Name

Abbreviation

Function

I/O

Reset Configuration

RCON

The Serial Flash Programming mode is entered by asserting the

RCON pin (with the TEST pin negated) as the chip comes out of

reset. During this mode, the EzPort has access to the Flash memory

which can be programmed from an external device.

—

Test

TEST

Reserved for factory testing only and in normal modes of operation

should be connected to VSS to prevent unintentional activation of

test functions.

Table 7. External Interrupt Signals

Signal Name

Abbreviation

Function

I/O

External Interrupts

IRQ[15:1]

External interrupt sources.

MCF52235 Datasheet(PDF) 22 Page - Freescale Semiconductor, Inc

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