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MCF52235 Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc

Part # MCF52235
Description  ColdFire Microcontroller
PDF  54 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MCF52235 Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc

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MCF52235 Family Configurations
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
5
1.2.1
Feature Overview
The MCF52235 family includes the following features:
•
Version 2 ColdFire variable-length RISC processor core
— Static operation
— 32-bit address and data paths on-chip
— Up to 60 MHz processor core frequency
— Sixteen general-purpose, 32-bit data and address registers
— Implements ColdFire ISA_A with extensions to support the user stack pointer register and four new instructions
for improved bit processing (ISA_A+)
— Enhanced Multiply-Accumulate (EMAC) unit with 32-bit accumulator to support 16
× 16 → 32 or 32 × 32 → 32
operations
— Cryptography Acceleration Unit (CAU)
–
Tightly-coupled coprocessor to accelerate software-based encryption and message digest functions
–
FIPS-140 compliant random number generator
— Support for DES, 3DES, AES, MD5, and SHA-1 algorithms
— Illegal instruction decode that allows for 68K emulation support
•
System debug support
— Real time trace for determining dynamic execution path
— Background debug mode (BDM) for in-circuit debugging (DEBUG_B+)
— Real time debug support, with six hardware breakpoints (4 PC, 1 address and 1 data) that can be configured into
a 1- or 2-level trigger
•
On-chip memories
— Up to 32 Kbytes of dual-ported SRAM on CPU internal bus, supporting core and DMA access with standby power
supply support
— Up to 256 Kbytes of interleaved Flash memory supporting 2-1-1-1 accesses
•
Power management
— Fully static operation with processor sleep and whole chip stop modes
— Rapid response to interrupts from the low-power sleep mode (wake-up feature)
— Clock enable/disable for each peripheral when not used
•
Fast Ethernet Controller (FEC)
— 10/100 BaseT/TX capability, half duplex or full duplex
— On-chip transmit and receive FIFOs
— Built-in dedicated DMA controller
— Memory-based flexible descriptor rings
•
On-chip Ethernet Transceiver (EPHY)
— Digital adaptive equalization
— Supports auto-negotiation
— Baseline wander correction
— Full-/Half-duplex support in all modes
— Loopback modes
— Supports MDIO preamble suppression
— Jumbo packet
•
FlexCAN 2.0B module



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