SH7261 datasheet(456/1348 Pages) RENESAS

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Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 424 of 1312

REJ09B0320-0200

Bit

Bit Name

Initial

Value

R/W

Description

CMFV5

R/(W)*

Compare Match/Input Capture Flag V5

Status flag that indicates the occurrence of TGRV_5 input

capture or compare match.

[Setting conditions]

• When TCNTV_5 = TGRV_5 and TGRV_5 is

functioning as output compare register

• When TCNTV_5 value is transferred to TGRV_5 by

input capture signal while TGRV_5 is functioning as

input capture register

• When TCNTV_5 value is transferred to TGRV_5

while TGRV_5 is functioning as a register for

measuring the pulse width of the external input

signal*

[Clearing condition]

• When 0 is written to CMFV5 after reading CMFV5 = 1

CMFW5

R/(W)*

Compare Match/Input Capture Flag W5

Status flag that indicates the occurrence of TGRW_5

input capture or compare match.

[Setting conditions]

• When TCNTW_5 = TGRW_5 and TGRW_5 is

functioning as output compare register

• When TCNTW_5 value is transferred to TGRW_5 by

input capture signal while TGRW_5 is functioning as

input capture register

• When TCNTW_5 value is transferred to TGRW_5

while TGRW_5 is functioning as a register for

measuring the pulse width of the external input

signal*

[Clearing condition]

• When 0 is written to CMFW5 after reading CMFW5 =

Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.

2. Timing to transfer is set by the IOC bit in the timer I/O control register U_5/V_5/W_5

(TIORU_5/V_5/W_5).

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