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SH7261 Datasheet(PDF) 457 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 457 Page - Renesas Technology Corp |
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457 / 1348 page ![]() Section 12 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 2.00 Sep. 07, 2007 Page 425 of 1312 REJ09B0320-0200 12.3.7 Timer Buffer Operation Transfer Mode Register (TBTM) TBTM is an 8-bit readable/writable register that specifies the timing for transferring data from the buffer register to the timer general register in PWM mode. The MTU2 has three TBTM registers, one each for channels 0, 3, and 4. Bit: Initial value: R/W: 7654321 0 00000000 R R R R R R/W R/W R/W — — — — — TTSE TTSB TTSA Bit Bit Name Initial Value R/W Description 7 to 3 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 2 TTSE 0 R/W Timing Select E Specifies the timing for transferring data from TGRF_0 to TGRE_0 when they are used together for buffer operation. For channels 3 and 4, bit 2 is reserved. It is always read as 0 and the write value should always be 0. Do not set this bit to 1 when channel 0 is to be used in a mode other than PWM mode. 0: When compare match E occurs in channel 0 1: When TCNT_0 is cleared 1 TTSB 0 R/W Timing Select B Specifies the timing for transferring data from TGRD to TGRB in each channel when they are used together for buffer operation. Do not set this bit to 1 when the channel is to be used in a mode other than PWM mode. 0: When compare match B occurs in each channel 1: When TCNT is cleared in each channel |
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