SH7261 datasheet(471/1348 Pages) RENESAS

471 / 1348 page

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 439 of 1312

REJ09B0320-0200

12.3.17

Timer Read/Write Enable Register (TRWER)

TRWER is an 8-bit readable/writable register that enables or disables access to the registers and

counters which have write-protection capability against accidental modification in channels 3 and

Bit:

Initial value:

R/W:

7654321

00000001

RRRRRRR

R/W

———————

RWE

Bit

Bit Name

Initial

Value

R/W

Description

7 to 1

—

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

RWE

R/W

Read/Write Enable

Enables or disables access to the registers which have

write-protection capability against accidental

modification.

0: Disables read/write access to the registers

1: Enables read/write access to the registers

[Clearing condition]

• When 0 is written to the RWE bit after reading

RWE = 1

• Registers and counters having write-protection capability against accidental modification

22 registers: TCR_3, TCR_4, TMDR_3, TMDR_4, TIORH_3, TIORH_4, TIORL_3,

TIORL_4, TIER_3, TIER_4, TGRA_3, TGRA_4, TGRB_3, TGRB_4, TOER, TOCR1,

TOCR2, TGCR, TCDR, TDDR, TCNT_3, and TCNT_4.

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