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SH7261 Datasheet(PDF) 469 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 469 Page - Renesas Technology Corp |
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469 / 1348 page ![]() Section 12 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 2.00 Sep. 07, 2007 Page 437 of 1312 REJ09B0320-0200 12.3.16 Timer Counter Synchronous Start Register (TCSYSTR) TCSYSTR is an 8-bit readable/writable register that specifies synchronous start of the MTU2 counters. Bit: Initial value: R/W: 7654321 0 00000000 R/(W)*R/(W)*R/(W)*R/(W)*R/(W)* RRR Note: Only 1 can be written to set the register. * SCH0 SCH1 SCH2 SCH3 SCH4 — — — Bit Bit Name Initial Value R/W Description 7 SCH0 0 R/(W)* Synchronous Start Controls synchronous start of TCNT_0 in the MTU2. 0: Does not specify synchronous start for TCNT_0 in the MTU2 1: Specifies synchronous start for TCNT_0 in the MTU2 [Clearing condition] • When 1 is set to the CST0 bit of TSTR in MTU2 while SCH0 = 1 6 SCH1 0 R/(W)* Synchronous Start Controls synchronous start of TCNT_1 in the MTU2. 0: Does not specify synchronous start for TCNT_1 in the MTU2 1: Specifies synchronous start for TCNT_1 in the MTU2 [Clearing condition] • When 1 is set to the CST1 bit of TSTR in MTU2 while SCH1 = 1 |
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