SH7261 datasheet(465/1348 Pages) RENESAS

465 / 1348 page

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 433 of 1312

REJ09B0320-0200

12.3.14

Timer Start Register (TSTR)

TSTR is an 8-bit readable/writable register that selects operation/stoppage of TCNT for channels 0

to 4.

TSTR_5 is an 8-bit readable/writable register that selects operation/stoppage of TCNTU_5,

TCNTV_5, and TCNTW_5 for channel 5.

When setting the operating mode in TMDR or setting the count clock in TCR, first stop the TCNT

counter.

• TSTR

Bit:

Initial value:

R/W:

7654321

00000000

R/W

CST4 CST3

—

CST2 CST1 CST0

Bit

Bit Name

Initial

Value

R/W

Description

CST4

R/W

CST3

R/W

Counter Start 4 and 3

These bits select operation or stoppage for TCNT.

If 0 is written to the CST bit during operation with the

TIOC pin designated for output, the counter stops but

the TIOC pin output compare output level is retained. If

TIOR is written to when the CST bit is cleared to 0, the

pin output level will be changed to the set initial output

value.

0: TCNT_4 and TCNT_3 count operation is stopped

1: TCNT_4 and TCNT_3 performs count operation

5 to 3

—

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

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