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SH7261 Datasheet(PDF) 684 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 684 Page - Renesas Technology Corp

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Section 15 Realtime Clock (RTC)
Rev. 2.00 Sep. 07, 2007 Page 652 of 1312
REJ09B0320-0200
15.3.11
Hour Alarm Register (RHRAR)
RHRAR is an alarm register corresponding to the BCD coded hour counter RHRCNT of the RTC.
When the ENB bit is set to 1, a comparison with the RHRCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincides, an alarm flag of RCR1 is set to 1.
The assignable range is from 00 through 23
+ ENB bits (practically in BCD), otherwise operation
errors occur.
The ENB bit in RHRAR is initialized by a power-on reset or in deep standby mode. The other bits
are not initialized by a power-on reset or manual reset, or in deep standby and software standby
modes.
0
1
2
3
4
5
6
7
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
R
Bit:
Initial value:
R/W:
ENB
—
——————
10 hours
1 hour
Bit
Bit Name
Initial
Value
R/W
Description
7
ENB
0
R/W
When this bit is set to 1, a comparison with the
RHRCNT value is performed.
6
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
5, 4
10 hours
Undefined
R/W
Ten's position of hours setting value
3 to 0
1 hour
Undefined
R/W
One's position of hours setting value



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