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SH7261 Datasheet(PDF) 686 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 686 Page - Renesas Technology Corp |
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686 / 1348 page ![]() Section 15 Realtime Clock (RTC) Rev. 2.00 Sep. 07, 2007 Page 654 of 1312 REJ09B0320-0200 15.3.13 Date Alarm Register (RDAYAR) RDAYAR is an alarm register corresponding to the BCD coded date counter RDAYCNT. When the ENB bit is set to 1, a comparison with the RDAYCNT value is performed. From among RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm register comparison is performed only on those with ENB bits set to 1, and if each of those coincides, an alarm flag of RCR1 is set to 1. The assignable range is from 01 through 31 + ENB bits (practically in BCD), otherwise operation errors occur. The ENB bit in RDAYAR is initialized by a power-on reset or in deep standby mode. The other bits are not initialized by a power-on reset or manual reset, or in deep standby and software standby modes. R/W ENB 0 1 2 3 4 5 6 7 0 R/W R/W R/W 0 R Bit: Initial value: R/W: — 10 days —— R/W R/W — R/W —— — 1 day Bit Bit Name Initial Value R/W Description 7 ENB 0 R/W When this bit is set to 1, a comparison with the RDAYCNT value is performed. 6 0 R Reserved This bit is always read as 0. The write value should always be 0. 5, 4 10 days Undefined R/W Ten's position of dates setting value 3 to 0 1 day Undefined R/W One's position of dates setting value |
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