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SH7261 Datasheet(PDF) 689 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 689 Page - Renesas Technology Corp |
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689 / 1348 page ![]() Section 15 Realtime Clock (RTC) Rev. 2.00 Sep. 07, 2007 Page 657 of 1312 REJ09B0320-0200 15.3.16 RTC Control Register 1 (RCR1) RCR1 is a register that affects carry flags and alarm flags. It also selects whether to generate interrupts for each flag. RCR1 is initialized to H'00 by a power-on reset, a manual reset, or in deep standby mode. The CF flag is retained undefined until the division circuit is reset (the RESET and ADJ bits in RCR2 are set to 1). When using the CF flag, make sure to reset the divider circuit beforehand. This register is not initialized in software standby mode. 0 1 2 3 4 5 6 7 0 0 0 0 0 0 0 R R R R R/W R/W R/W R/W Bit: Initial value: R/W: CF — — — CIE AIE — — AF Bit Bit Name Initial Value R/W Description 7 CF Undefined R/W Carry Flag Status flag that indicates that a carry has occurred. CF is set to 1 when a count-up to 64-Hz occurs at the second counter carry or 64-Hz counter read. A count register value read at this time cannot be guaranteed; another read is required. 0: No carry of 64-Hz counter by second counter or 64- Hz counter [Clearing condition] • When 0 is written to CF 1: Carry of 64-Hz counter by second counter or 64 Hz counter [Setting condition] • When the second counter or 64-Hz counter is read during a carry occurrence by the 64-Hz counter, or 1 is written to CF. 6, 5 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. |
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