SH7261 datasheet(693/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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693 / 1348 page

Section 15 Realtime Clock (RTC)

Rev. 2.00 Sep. 07, 2007 Page 661 of 1312

REJ09B0320-0200

15.3.18

RTC Control Register 3 (RCR3)

When the ENB bit in RCR3 is set to 1, RCR3 compares the value of RYRCNT and that of

RYRAR. From among RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the

counter and alarm register comparison is performed only on those with ENB bits set to 1, and if

each of those coincides, an alarm flag of RCR1 is set to 1.

The ENB bit in RCR3 is initialized by a power-on reset or in deep standby mode. Remaining

fields of RCR3 are not initialized by a power-on reset or manual reset, or in deep standby and

software standby modes.

R/W

Bit:

Initial value:

R/W:

ENB

—

——

Bit

Bit Name

Initial

Value

R/W

Description

ENB

R/W

When this bit is set to 1, comparison of the year alarm

performed.

6 to 0



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

SH7261 Datasheet(PDF) 693 Page - Renesas Technology Corp