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SH7261 Datasheet(PDF) 690 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 690 Page - Renesas Technology Corp |
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690 / 1348 page ![]() Section 15 Realtime Clock (RTC) Rev. 2.00 Sep. 07, 2007 Page 658 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 4 CIE 0 R/W Carry Interrupt Enable Flag When the carry flag (CF) is set to 1, the CIE bit enables interrupts. 0: A carry interrupt is not generated when the CF flag is set to 1 1: A carry interrupt is generated when the CF flag is set to 1 3 AIE 0 R/W Alarm Interrupt Enable Flag When the alarm flag (AF) is set to 1, the AIE bit allows interrupts. 0: An alarm interrupt is not generated when the AF flag is set to 1 1: An alarm interrupt is generated when the AF flag is set to 1 2, 1 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 0 AF 0 R/W Alarm Flag The AF flag is set when the alarm time, which is set by an alarm register (ENB bit in RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR, or RYRAR is set to 1), and counter match. 0: Alarm register and counter not match [Clearing condition] • When 0 is written to AF. 1: Alarm register and counter match* [Setting condition] • When alarm register (only a register with ENB bit set to 1) and counter match Note: * Writing 1 holds previous value. |
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