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SH7261 Datasheet(PDF) 685 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 685 Page - Renesas Technology Corp

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Section 15 Realtime Clock (RTC)
Rev. 2.00 Sep. 07, 2007 Page 653 of 1312
REJ09B0320-0200
15.3.12
Day of Week Alarm Register (RWKAR)
RWKAR is an alarm register corresponding to the BCD coded day of week counter RWKCNT.
When the ENB bit is set to 1, a comparison with the RWKCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincides, an alarm flag of RCR1 is set to 1.
The assignable range is from 0 through 6 + ENB bits (practically in BCD), otherwise operation
errors occur.
The ENB bit in RWKAR is initialized by a power-on reset or in deep standby mode. The other bits
are not initialized by a power-on reset or manual reset, or in deep standby and software standby
modes.
R/W
ENB
0
1
2
3
4
5
6
7
0
R/W
R/W
R/W
0
R
Bit:
Initial value:
R/W:
—
0
R
—
0
R
—
0
R
—
———
Day
Bit
Bit Name
Initial
Value
R/W
Description
7
ENB
0
R/W
When this bit is set to 1, a comparison with the
RWKCNT value is performed.
6 to 3
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
2 to 0
Day
Undefined
R/W
Day of week setting value
000: Sunday
001: Monday
010: Tuesday
011: Wednesday
100: Thursday
101: Friday
110: Saturday
111: Reserved (setting prohibited)



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