SH7261 datasheet(743/1348 Pages) RENESAS

743 / 1348 page

Section 16 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 Sep. 07, 2007 Page 711 of 1312

REJ09B0320-0200

Figure 16.3 shows a sample flowchart for initializing the SCIF.

Start of initialization

Clear TE and RE bits in SCSCR to 0

Set TFRST and RFRST bits

in SCFCR to 1

Set CKE[1:0] bits

in SCSCR (leaving TIE, RIE, TE,

and RE bits cleared to 0)

Set data transfer format in SCSMR

Set value in SCBRR

Set RTRG[1:0], TTRG[1:0], and MCE bits

in SCFCR, and clear TFRST

and RFRST bits to 0

Set TE and RE bits in SCSCR to 1,

and set TIE, RIE, and REIE bits

End of initialization

Set the clock selection in SCSCR.

Be sure to clear bits TIE, RIE, TE,

and RE to 0.

Set the data transfer format in

SCSMR.

Write a value corresponding to the

bit rate into SCBRR. (Not

necessary if an external clock is

used.)

Sets PFC for external pins used.

Set as RxD input at reciving and

TxD at transmission.

However, no setting for SCK pin is

required when CKE[1:0] is 00.

Set the TE bit or RE bit in SCSCR

to 1. Also set the RIE, REIE, and

TIE bits. Setting the TE and RE bits

enables the TxD and RxD pins to

be used.

When transmitting, the SCIF will go

to the mark state; when receiving,

it will go to the idle state, waiting for

a start bit.

When the intrnal clock output is

selected, a clock starts to be output

from the SCK pin at this point.

[1]

[2]

[3]

[4]

[5]

[2]

[3]

[5]

PFC setting for external pins used

SCK, TxD, RxD

[4]

After reading ER, DR, and BRK flags

in SCFSR, and each flag in SCLSR,

write 0 to clear them

Figure 16.3 Sample Flowchart for SCIF Initialization

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