| Electronic Components Datasheet Search |
|
SH7261 Datasheet(PDF) 806 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7261 Datasheet(HTML) 806 Page - Renesas Technology Corp |
|
806 / 1348 page ![]() Section 18 Serial Sound Interface (SSI) Rev. 2.00 Sep. 07, 2007 Page 774 of 1312 REJ09B0320-0200 18.3 Register Description The SSI has the following registers. Note that explanation in the text does not refer to the channels. Table 18.2 Register Description Channel Register Name Abbreviation R/W Initial Value Address Access Size Control register 0 SSICR0 R/W H'00000000 H'FFFED000 32 Status register 0 SSISR0 R/W* H'02000003 H'FFFED004 32 Transmit data register 0 SSITDR0 R/W H'00000000 H'FFFED008 32 0 Receive data register 0 SSIRDR0 R H'00000000 H'FFFED00C 32 Control register 1 SSICR1 R/W H'00000000 H'FFFED080 32 Status register 1 SSISR1 R/W* H'02000003 H'FFFED084 32 Transmit data register 1 SSITDR1 R/W H'00000000 H'FFFED088 32 1 Receive data register 1 SSIRDR1 R H'00000000 H'FFFED08C 32 Note: * For this register, bits 26 and 27 are capable of reading and writing, although the others are read-only bits. For details, refer to section 18.3.2, Status Register (SSISR). |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |