SH7261 datasheet(869/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

869 / 1348 page

Section 19 Controller Area Network (RCAN-ET) [R5S72611] [R5S72613]

Rev. 2.00 Sep. 07, 2007 Page 837 of 1312

REJ09B0320-0200

19.4.4

Interrupt Request Register (IRR)

The interrupt register (IRR) is a 16-bit read/write-clearable register containing status flags for the

various interrupt sources.

• IRR (Address = H'008)

Bit:

Initial value:

R/W:

0000000000000001

R/W

—

IRR13 IRR12

—

IRR9 IRR8 IRR7 IRR6 IRR5 IRR4 IRR3 IRR2 IRR1 IRR0

Bits 15 to 14: Reserved.

Bit 13 - Message Error Interrupt (IRR13): This interrupt indicates that:

• A message error has occurred when in test mode.

• Note: If a Message Overload condition occurs when in Test Mode, then this bit will not be set.

When not in test mode this interrupt is inactive.

Bit 13: IRR13

Description

message error has not occurred in test mode (Initial value)

[Clearing condition] Writing 1

[Setting condition] message error has occurred in test mode

SH7261 Datasheet(PDF) 869 Page - Renesas Technology Corp