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SH7261 Datasheet(PDF) 866 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 866 Page - Renesas Technology Corp |
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866 / 1348 page ![]() Section 19 Controller Area Network (RCAN-ET) [R5S72611] [R5S72613] Rev. 2.00 Sep. 07, 2007 Page 834 of 1312 REJ09B0320-0200 Bit 0 — Bit Sample Point (BSP = BCR1[0]): Sets the point at which data is sampled. Three-time sampling is only available when the BRP is programmed to be greater than 4. Bit 0: BSP Description 0 Bit sampling at one point (end of time segment 1) (Initial value) 1 Bit sampling at three points (rising edge of the last three clock cycles of PHSEG1) • BCR0 (Address = H'006) Bit: Initial value: R/W: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0000000000000000 R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W — — — — — — — — BRP[7:0] Bits 8 to 15 : Reserved. The written value should always be '0' and the returned value is '0'. Bits 7 to 0—Baud Rate Pre-scale (BRP[7:0] = BCR0 [7:0]): These bits are used to define the peripheral bus clock periods contained in a Time Quantum. Bit 7: BRP[7] Bit 6: BRP[6] Bit 5: BRP[5] Bit 4: BRP[4] Bit 3: BRP[3] Bit 2: BRP[2] Bit 1: BRP[1] Bit 0: BRP[0] Description 0 0 0 0 0 0 0 0 2 × peripheral bus clock (Initial value) 0 0 0 0 0 0 0 1 4 × peripheral bus clock 0 0 0 0 0 0 1 0 6 × peripheral bus clock : : : : : : : : : : : : : : : : 2 × (register value+1) × peripheral bus clock 1 1 1 1 1 1 1 1 512 × peripheral bus clock |
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