SH7261 datasheet(901/1348 Pages) RENESAS

901 / 1348 page

Section 19 Controller Area Network (RCAN-ET) [R5S72611] [R5S72613]

Rev. 2.00 Sep. 07, 2007 Page 869 of 1312

REJ09B0320-0200

19.7

Interrupt Sources

Table 19.10 lists the RCAN-ET interrupt sources. With the exception of the reset processing

interrupt (IRR0) by a power-on reset, these sources can be masked. Masking is implemented using

the mailbox interrupt mask register 0 (MBIMR0) and interrupt mask register (IMR). For details on

the interrupt vector of each interrupt source, see section 6, Interrupt Controller (INTC).

Table 19.10 RCAN-ET Interrupt Sources

Channel

Interrupt

Description

Interrupt

Flag

DTC

Activation

Error Passive Mode (TEC

≥ 128 or REC ≥ 128)

IRR5

Bus Off (TEC

≥ 256)/Bus Off recovery

IRR6

Error warning (TEC

≥ 96)

IRR3

ERS_0

Error warning (REC

≥ 96)

IRR4

Message error detection

IRR13*

Reset/halt/CAN sleep transition

IRR0

Overload frame transmission

IRR7

Unread message overwrite (overrun)

IRR9

OVR_0

Detection of CAN bus operation in CAN sleep

mode

IRR12

SLE_0

Message transmission/transmission disabled

(slot empty)

IRR8

RM1_0*

Not

possible

RM0_0*

Data frame reception/

Remote frame reception

IRR1*

IRR2*

Possible

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