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SH7261 Datasheet(PDF) 940 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 940 Page - Renesas Technology Corp |
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940 / 1348 page ![]() Section 20 IEBus TM Controller (IEB) [R5S72612] [R5S72613] Rev. 2.00 Sep. 07, 2007 Page 908 of 1312 REJ09B0320-0200 20.3.12 IEBus Receive Message Length Register (IERBFL) IERBFL indicates the message length field in slave/broadcast reception. This register is enabled when slave/broadcast receive starts, and the contents are changed at the time of setting the RXS flag in IERSR. This register cannot be modified. IERBFL is initialized by a power-on reset or in deep standby. 76543210 Bit: Initial value: R/W: 00000000 RRRRRRRR RBFL Bit Bit Name Initial Value R/W Description 7 to 0 RBFL All 0 R IEBus Receive Message Length Indicates the contents of the message length field in slave/broadcast reception. 20.3.13 IEBus Lock Address Register 1 (IELA1) IELA1 specifies the lower eight bits of a locked address when a unit is locked. IELA1 is initialized by a power-on reset or in deep standby. 76543210 Bit: Initial value: R/W: 00000000 RRRRRRRR ILAL8 Bit Bit Name Initial Value R/W Description 7 to 0 ILAL8 All 0 R Lower Eight Bits of IEBus Lock Address Indicates the lower eight bits of the master unit address when a unit is locked. These bits are valid only when the LCK bit in IEFLG is set. |
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