 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SH7261 Datasheet(PDF) 941 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7261 Datasheet(HTML) 941 Page - Renesas Technology Corp |
|
|
941 / 1348 page  Section 20 IEBus TM Controller (IEB) [R5S72612] [R5S72613] Rev. 2.00 Sep. 07, 2007 Page 909 of 1312 REJ09B0320-0200 20.3.14 IEBus Lock Address Register 2 (IELA2) IELA2 specifies the upper four bits of a locked address when a unit is locked. IELA2 is initialized by a power-on reset or in deep standby. 76543210 Bit: Initial value: R/W: 00000000 RRRRRRRR ———— ILAU4 Bit Bit Name Initial Value R/W Description 7 to 4 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 3 to 0 ILAU4 0000 R Upper Four Bits of IEBus Locked Address Stores the upper four bits of the master unit address when a unit is locked. These bits are valid only when the LCK bit in IEFLG is set |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
