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SH7261 Datasheet(PDF) 944 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 944 Page - Renesas Technology Corp

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Section 20 IEBus
TM Controller (IEB) [R5S72612] [R5S72613]
Rev. 2.00 Sep. 07, 2007 Page 912 of 1312
REJ09B0320-0200
Bit
Bit Name
Initial
Value
R/W
Description
3
LCK
0
R
Lock Status Indication
Set to 1 when a unit is locked by a lock request from
the master unit. IELA1 and IELA2 values are valid only
when this flag is set to 1.
0: A unit is unlocked
1: A unit is locked
[Setting condition]
• When data for the number of bytes specified by the
message length is not received after the control bits
that make the unit locked are received from the
master unit. (The LCK flag is set to 1 only when the
message length exceeds the maximum number of
transfer bytes in one frame. This flag is not set by
completion of other errors.)
[Clearing condition]
• When an unlock condition is satisfied or when an
unlock command is issued.
2
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
1
RSS
0
R
Receive Broadcast Bit Status
Indicates the received broadcast bit value. This flag is
valid when the slave/broadcast reception is started.
(This flag is changed at the time of setting the RXS
flag.)
The previous value remains unchanged until the next
slave/broadcast reception is started.
0: Received broadcast bit is 0
1: Received broadcast bit is 1



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