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SH7261 Datasheet(PDF) 947 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 947 Page - Renesas Technology Corp

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Section 20 IEBus
TM Controller (IEB) [R5S72612] [R5S72613]
Rev. 2.00 Sep. 07, 2007 Page 915 of 1312
REJ09B0320-0200
Bit
Bit Name
Initial
Value
R/W
Description
2
TXETTME
0
R/(W)*
Transmit Timing Error
Set to 1 if data is not transmitted at the timing specified
by the IEB protocol during data transmission. The IEB
sets this bit and enters the wait state.
[Setting condition]
• When a timing error occurs during data
transmission
[Clearing condition]
• When 1 is written
1
TXERO
0
R/(W)*
Overflow of Maximum Number of Transmit Bytes in
One Frame
Indicates that the maximum number of bytes defined by
the communications mode have been transmitted
because a NAK has been received from the receive
unit and retransmit has been performed, or that
transmission has not been completed because the
message length value exceeds the maximum number
of transmit bytes in one frame. The IEB sets this bit and
enters the wait state.
[Setting condition]
• When the transmit has not been completed
although the maximum number of bytes defined by
the communications mode have been transmitted
[Clearing condition]
• When 1 is written



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