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SH7261 Datasheet(PDF) 998 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 998 Page - Renesas Technology Corp |
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998 / 1348 page ![]() Section 21 CD-ROM Decoder (ROM-DEC) Rev. 2.00 Sep. 07, 2007 Page 966 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 2 ST_ECCQ 0 R Indicates that Q-parity errors were not corrected in ECC correction. This bit is only valid when synchronization is normal (the sector is neither short nor long). This bit is set to 1 when the result of syndrome calculation for Q parity is non-0. 1 ST_EDC1 0 R Indicates that the result of the EDC check before ECC correction was 'fail'. This bit is also set to 1 if a short sector is encountered while EDC is enabled. 0 ST_EDC2 0 R Indicates that the result of the EDC check after ECC correction was 'fail'. 21.3.14 Buffer Status Register (CBUFST0) CBUFST0 indicates that the system is searching for the first sector to be buffered, or that buffering is in progress. 76543210 Bit: Initial value: R/W: 00000000 RRRRRRRR BUF_ REF BUF_ ACT ———— — — Bit Bit Name Initial Value R/W Description 7 BUF_REF 0 R Indicates that the search for the first sector to be buffered is in progress. This bit is only valid when the automatic buffering function is used (CBUF_AUT = 1). 6 BUF_ACT 0 R Indicates that buffering is in progress. 5 to 0 All 0 R Reserved These bits are always read as 0 and cannot be modified. |
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