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SH7261 Datasheet(PDF) 999 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 999 Page - Renesas Technology Corp |
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999 / 1348 page ![]() Section 21 CD-ROM Decoder (ROM-DEC) Rev. 2.00 Sep. 07, 2007 Page 967 of 1312 REJ09B0320-0200 21.3.15 Decoding Stoppage Source Status Register (CBUFST1) CBUFST1 indicates that decoding/buffering has been stopped due to some errors. A bit in this register can only be set when the corresponding bit in the CROMCTL3 register is set to 1. 76543210 Bit: Initial value: R/W: 00000000 RRRRRRRR BUF_ ECC BUF_ EDC — BUF_ MD BUF_ MIN —— — Bit Bit Name Initial Value R/W Description 7 BUF_ECC 0 R Indicates that decoding and buffering have been stopped because of an error that is not correctable by using the ECC. 6 BUF_EDC 0 R Indicates that decoding and buffering have been stopped because the post-correction EDC check indicated an error. 5 0 R Reserved This bit is always read as 0 and cannot be modified. 4 BUF_MD 0 R Indicates that decoding and buffering have been stopped because the current sector is in a mode or form differing from that of the previous sectors. 3 BUF_MIN 0 R Indicates that decoding and buffering have been stopped because a non-sequential minutes, seconds, or frames (1/75 second) value has been encountered. 2 to 0 All 0 R Reserved This bit is always read as 0 and cannot be modified. |
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