SH7261 datasheet(1014/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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1014 / 1348 page

Section 21 CD-ROM Decoder (ROM-DEC)

Rev. 2.00 Sep. 07, 2007 Page 982 of 1312

REJ09B0320-0200

21.3.43

Automatic Buffering Start Sector Setting: Seconds Control Register (CBUFCTL2)

CBUFCTL2 indicates the seconds value in the header for the first sector to be buffered.

76543210

Bit:

Initial value:

R/W:

00000000

R/W

BS_SEC[7:0]

Bit

Bit Name

Initial

Value

R/W

Description

7 to 0

BS_SEC[7:0]

All 0

R/W

Setting of the seconds value in the header for the first

sector to be buffered

21.3.44

Automatic Buffering Start Sector Setting: Frames Control Register (CBUFCTL3)

CBUFCTL3 indicates the frames (1 frame = 1/75 second) value in the header for the first sector to

be buffered.

76543210

Bit:

Initial value:

R/W:

00000000

R/W

BS_FRM[7:0]

Bit

Bit Name

Initial

Value

R/W

Description

7 to 0

BS_FRM[7:0]

All 0

R/W

Setting of the frames (1/75 second) value in the header

for the first sector to be buffered

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