SH7261 datasheet(1018/1348 Pages) RENESAS

1018 / 1348 page

Section 21 CD-ROM Decoder (ROM-DEC)

Rev. 2.00 Sep. 07, 2007 Page 986 of 1312

REJ09B0320-0200

Bit

Bit Name

Initial

Value

R/W

Description

5, 4

BUFEND0

[1:0]

R/W

These bits select whether to change the order of 16-bit

units of data transferred from the SSI module or

suppress the stream data. In the SSI module, either

"padding mode" or "non-padding mode" is selectable. In

non-padding mode, each 32 bits of data transferred

from the SSI are CD-ROM data. Since the CD-ROM

decoder has two 16-bit input data registers, the order of

the 16-bit data can be swapped within the 32 bits. On

the other hand, in padding mode each 32 bits of data

transferred from the SSI includes padding. Since the

padding is without meaning, it should be kept out of the

input stream to the decoder. This suppression can be

specified by the setting of this register.

The CD-ROM decoder handles data as a stream of 16-

bit data, and this register controls which 16-bit portion of

each 32 bits of data transferred from the SSI should be

input first.

00: The 16 bits of stream data that would otherwise be

processed first is discarded.

01: The higher-order 16 bits of each 32 bits of data

received from the SSI are placed first in the stream

to the decoder.

10: The lower-order 16 bits of each 32 bits of data

received from the SSI are placed first in the stream

to the decoder.

11: Setting prohibited. If made, this setting will produce

a malfunction.

SH7261 Datasheet(PDF) 1018 Page - Renesas Technology Corp