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SH7261 Datasheet(PDF) 311 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 311 Page - Renesas Technology Corp

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Section 9 Bus State Controller (BSC)
Rev. 2.00 Sep. 07, 2007 Page 279 of 1312
REJ09B0320-0200
CKIO
ACT: Row and bank activation command
WR: Write command
DSL: Deselect command
PRA: Precharge-all command
SDRAM command
Data bus
Single write
Note: If the interval set in DRAS is longer than the period from when the WR
command is issued until the DRAS interval elapses, the DWR setting
is used.
ACT
DSL
WR
PRA
DSL
DRCD
(ACT-WR)
DWR
(WR-PRA)
DPCG
(PRA-next)
DRAS
(ACT-PRA)
d
Figure 9.40 Single Write Timing Example 2
CKIO
ACT: Row and bank activation command
WR: Write command
DSL: Deselect command
PRA: Precharge-all command
SDRAM command
Data bus
Single write
ACT
DSL
WR
DSL
PRA
DSL
DRCD
(ACT-WR)
DWR
(WR-PRA)
DPCG
(PRA-next)
DRAS
(ACT-PRA)
d
Figure 9.41 Single Write Timing Example 3



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