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SH7672 Datasheet(PDF) 448 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 448 Page - Renesas Technology Corp |
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448 / 1292 page  Section 12 Ethernet Controller (EtherC) Rev. 1.00 Nov. 14, 2007 Page 422 of 1262 REJ09B0437-0100 12.3.20 Automatic PAUSE Frame Set Register (APR) APR sets the TIME parameter value of the automatic PAUSE frame. When transmitting the automatic PAUSE frame, the value set in this register is used as the TIME parameter of the PAUSE frame. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Bit: Initial value: R/W: 15 14 13 12 11 10 9876543210 Bit: Initial value: R/W: 0000000000000000 RRRRRRRRRRRRRRRR 0000000000000000 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W ---------------- AP[15:0] Bit Bit Name Initial Value R/W Description 31 to 16 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 15 to 0 AP[15:0] All 0 R/W Automatic PAUSE Sets the TIME parameter value of the automatic PAUSE frame. At this time, 1 bit means 512-bit time. |
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