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SH7672 Datasheet(PDF) 461 Page - Renesas Technology Corp |
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SH7672 Datasheet(HTML) 461 Page - Renesas Technology Corp |
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461 / 1292 page ![]() Section 12 Ethernet Controller (EtherC) Rev. 1.00 Nov. 14, 2007 Page 435 of 1262 REJ09B0437-0100 Manual PAUSE Frame Transmission: PAUSE frames are transmitted by directives from the software. When writing the Timer value to the manual PAUSE frame set register (MPR), manual PAUSE frame transmission is started. With this method, PAUSE frame transmission is carried out only once. PAUSE Frame Reception: The next frame is not transmitted until the time indicated by the Timer value elapses after receiving a PAUSE frame. However, the transmission of the current frame is continued. A received PAUSE frame is valid only when the RXF bit in the EtherC mode register (ECMR) is set to 1. 12.5 Connection to PHY-LSI Figure 12.8 shows the example of connection to a DP83846AVHG by National Semiconductor Corporation. TX-ER MII_TXD3 MII_TXD2 MII_TXD1 MII_TXD0 TX-EN TX-CLK MDC MDIO MII_RXD3 MII_RXD2 MII_RXD1 MII_RXD0 RX-CLK CRS COL RX-DV RX-ER TX_ER TXD3 TXD2 TXD1 TXD0 TX_EN TX_CLK MDC MDIO RXD3 RXD2 RXD1 RXD0 RX_CLK CRS COL RX_DV RX_ER DP83846AVHG MII (Media Independent Interface) This LSI Figure 12.8 Example of Connection to DP83846AVHG |
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