 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
38K2 Datasheet(PDF) 228 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
38K2 Datasheet(HTML) 228 Page - Renesas Technology Corp |
|
|
228 / 358 page  2.9 Watchdog timer Rev.2.00 Oct 15, 2006 page 79 of 112 38K2 Group REJ09B0338-0200 APPLICATION Fig. 2.9.3 Structure of CPU mode register b7 b6 b5 b4 b3 b2 b1 b0 R W 0 0 2 0 3 4 5 6 7 1 0 0 1 0 01 b1 b0 0 0 : Single-chip mode 0 1 : Not available 1 0 : Not available 1 1 : Not available B Name Function At reset 0 : 0 page 1 : 1 page * CPU mode register (CPUM: address 3B16) CPU mode register Processor mode bits Stack page selection bit Fix this bit to “1”. Fix this bit to “0”. 0 : Main clock f(XIN) 1 : fSYN System clock selection bit b7 b6 0 0 : φ = f(system clock)/8 (8-divide mode) 0 1 : φ = f(system clock)/4 (4-divide mode) 1 0 : φ = f(system clock)/2 (2-divide mode) 1 1 : φ = f(system clock) (Through mode) System clock division ratio selection bits *: The initial value of bit 1 depends on the CNVss level. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
