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SH7014 Datasheet(PDF) 610 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 610 Page - Renesas Technology Corp |
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610 / 754 page  22. Electrical Characteristics (5 V 28.7 MHz) Rev.5.00 Sep. 27, 2007 Page 576 of 716 REJ09B0398-0500 CK A21 to A0 Tp tASR D15 to D0 (During read) Tc2 Tc1 tAD tRP tRASD2 tCASD2 tAA tRAC tRDH tRWD1 tRWD2 tDS tDH tDACKD1 tDACKD1 tRSD1 D15 to D0 (During write) Tc2 Tr Tc1 tAD tAA tCASD2 tCP tDS tDH tWDH tRSD2 tRSD2 tRSD1 tWSD1 tWSD2 tWSD2 tWSD1 tCP tRWD1 RAS CASx (During read) RDWR (During read) CASx (During write) RDWR (During write) DACKn RD (During read) WRx (During write) Row address Column address Column address tRASD1 tRAH tCASD1 tCASD2 tCASD1 tCAC tRDS tCAC tRDS tRDH tRWD2 tCASD1 tCASD2 tCASD1 tWDD tWDD tWDH tDACKD1 Note: tRDH is specified from the first negate timing for A21 to A0, RAS, and CAS. Figure 22.14 DRAM Cycle (High-Speed Page Mode) |
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