SH7014 datasheet(691/754 Pages) RENESAS

691 / 754 page

Appendix A On-Chip Supporting Module Registers

Rev.5.00 Sep. 27, 2007 Page 657 of 716

REJ09B0398-0500

A/D (SH7016, SH7017)

A/D Data Register A to D (ADDRA to ADDRD)

H'FFFF8420

H'FFFF8422

H'FFFF8424

H'FFFF8426

8/16

Bit

Item

Bit name

AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

―

Initial value

R/W

A/D Control/Status Register (ADCSR)

H'FFFF8428

8/16

Bit

Item

Bit name

ADF

ADIE

ADST

SCAN

CKS

CH2

CH1

CH0

Initial value

R/W

R/(W)*

R/W

Note:

Only 0 can be written to bit 7 to clear the flag.

Bit

Name

Value

Description

Clear conditions:

(initial value)

Writing 0 to ADF after reading ADF with ADF

= 1

When registers of the mid-speed converter

are accessed after the DMAC is activated by

ADI interrupt

A/D End Flag (ADF)

Set conditions:

Single mode: When A/D conversion is

complete

Scan mode: When A/D conversion of all

designated channels are complete

Disables interrupt request (ADI) due to

completion of A/D conversion

(initial value)

A/D Interrupt Enable (ADIE)

Enables interrupt request (ADI) due to

completion of A/D conversion

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