SH7014 datasheet(117/754 Pages) RENESAS

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6. Interrupt Controller (INTC)

Rev.5.00 Sep. 27, 2007 Page 83 of 716

REJ09B0398-0500

Bit 8

⎯NMI Edge Select (NMIE)

Bit 8

NMIE

Description

Interrupt request is detected on falling edge of NMI input

(initial value)

Interrupt request is detected on rising edge of NMI input

Bits 7 to 4, 1, 0

⎯IRQ0 to IRQ3, IRQ6, IRQ7 Sense Select (IRQ0S to IRQ3S, IRQ6S,

IRQ7S): These bits set the IRQ0 to IRQ3, IRQ6, IRQ7 interrupt request detection mode.

Bits 7 to 4, 1, 0

IRQ0S to IRQ3S, IRQ6S,

IRQ7S

Description

Interrupt request is detected on low level of IRQ input

(initial value)

Interrupt request is detected on falling edge of IRQ input

6.3.3

IRQ Status Register (ISR)

The ISR is a 16-bit register that indicates the interrupt request status of the external interrupt input

pins

IRQ0 to IRQ3, IRQ6, IRQ7. When IRQ interrupts are set to edge detection, held interrupt

requests can be withdrawn by writing a 0 to IRQnF after reading an IRQnF = 1.

A power-on reset initializes ISR but the standby mode does not.

Bit:

⎯

Initial value:

R/W:

Bit:

IRQ0F

IRQ1F

IRQ2F

IRQ3F

⎯

IRQ6F

IRQ7F

Initial value:

R/W:

R/W

Bits 15 to 8, 3, 2

⎯Reserved: These bits always read as 0. The write value should always be 0.

SH7014 Datasheet(PDF) 117 Page - Renesas Technology Corp

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