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7641 Datasheet(PDF) 137 Page - Renesas Technology Corp

Part # 7641
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  385 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7641 Datasheet(HTML) 137 Page - Renesas Technology Corp

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Rev.2.00
Aug 28, 2006
page 6 of 148
7641 Group
REJ09B0336-0200
APPLICATION
2.1 I/O port
Fig. 2.1.8 Structure of Interrupt request register C
Fig. 2.1.9 Structure of Interrupt control register C
Interrupt request register C
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register C
(IREQC : address 0416)
b
0
1
2
3
4
5
6
7
Name
0
Functions
At reset R W
0
0
0
0
0
0
Timer 3 interrupt request
bit
Serial I/O interrupt request
bit
Input buffer full interrupt
request bit
Key input interrupt request
bit
CNTR1 interrupt request
bit
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
CNTR0 interrupt request
bit
Output buffer empty
interrupt request bit
0
✽
✽
✽
✽
✽
✽
✽
✽: “0” can be set by software, but “1” cannot be set.
0
Fix this bit to “0”.
Interrupt control register C
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt control register C
(ICONC : address 0716)
b
0
1
2
3
4
5
6
7
Name
0
Functions
At reset R W
0
0
0
0
0
0
Timer 3 interrupt enable bit
Serial I/O interrupt enable
bit
Input buffer full interrupt
enable bit
Key input interrupt enable
bit
CNTR1 interrupt enable bit
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
CNTR0 interrupt enable bit
Output buffer empty
interrupt enable bit
0
0
Fix this bit to “0”.



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