SH7018 datasheet(345/431 Pages) RENESAS

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Table 16.3

Flash Memory Erase Blocks

Block (Size)

Address

EB0 (4 kB)

H'000000 to H'000FFF

EB1 (4 kB)

H'001000 to H'001FFF

EB2 (4 kB)

H'002000 to H'002FFF

EB3 (4 kB)

H'003000 to H'003FFF

EB4 (4 kB)

H'004000 to H'004FFF

EB5 (4 kB)

H'005000 to H'005FFF

EB6 (4 kB)

H'006000 to H'006FFF

EB7 (4 kB)

H'007000 to H'007FFF

EB8 (32 kB)

H'008000 to H'00FFFF

EB9 (64 kB)

H'010000 to H'01FFFF

EB10 (32 kB)

H'020000 to H'027FFF

16.5.5

RAM Emulation Register (RAMER)

RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating

real-time flash memory programming. RAMER is initialized to H'0000 by a power-on reset. It is

not initialized in standby mode. RAMER settings should be made in user mode or user program

mode.

Flash memory area divisions are shown in table 16.4. To ensure correct operation of the emulation

function, the ROM for which RAM emulation is performed should not be accessed immediately

after this register has been modified. Normal execution of an access immediately after register

modification is not guaranteed.

Bit:

——

———

—

Initial value:

R/W:

Bit:

—

RAMS

RAM1

RAM0

Initial value:

R/W:

R/W

• Bits 15 to 3—Reserved: These bits are always read as 0. The write value should always be 0.

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