SH7018 datasheet(346/431 Pages) RENESAS

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• Bit 2—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation

in RAM. When RAMS = 1, all flash memory block are program/erase-protected.

Bit 2:

RAMS

Description

Emulation not selected

Program/erase-protection of all flash memory blocks is disabled

(Initial value)

Emulation selected

Program/erase-protection of all flash memory blocks is enabled

• Bits 1 and 0—Flash Memory Area Selection (RAM1, RAM0): These bits are used together

with bit 2 to select the flash memory area to be overlapped with RAM. For each block, only

the first 1 kB of addresses can be overlapped. (See table 16.4.)

Table 16.4

Flash Memory Area Divisions

Addresses

Block Name

RAMS

RAM1

RAM0

H'FFF800 to H'FFFBFF

RAM area 1 kB

H'004000 to H'0043FF

EB4 (1 kB)

H'005000 to H'0053FF

EB5 (1 kB)

H'006000 to H'0063FF

EB6 (1 kB)

H'007000 to H'0073FF

EB7 (1 kB)

16.6

On-Board Programming Modes

When pins are set to on-board programming mode and a power-on reset-start is executed, a

transition is made to the on-board programming state in which program/erase/verify operations

can be performed on the on-chip flash memory. There are two on-board programming modes: boot

mode and user program mode. The pin settings for transition to each of these modes are shown in

table 16.5. For a diagram of the transitions to the various flash memory modes, see figure 16.2.

Table 16.5

Setting On-Board Programming Modes

Mode

FWP

MD3

MD2

MD1

MD0

Boot mode

00000

User program mode

00010

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