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SH7018 Datasheet(PDF) 166 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 166 Page - Renesas Technology Corp |
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166 / 431 page  150 Contention between Buffer Register Write and Compare Match: If a compare-match occurs in the T 2 state of the TGR write cycle, data is transferred by the buffer operation from the buffer register to the TGR. On channel 0, the data to be transferred is that after the write (figure 8.41). Buffer register Compare match signal Compare match buffer signal Address Write signal TGR φ T1 T2 TGR write cycle Buffer register address NM Buffer register write data M Figure 8.41 TGR Write and Compare-Match Contention (Channel 0) |
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