SH7018 datasheet(300/431 Pages) RENESAS

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284

Port A Control Register L1 (PACRL1)

Bit:

—

PA15MD

—

PA14MD

—

PA12MD

Initial value:

R/W:

R/W

Bit:

—

PA11MD0

—

PA10MD PA9MD1

—

PA8MD1

—

Initial value:

R/W:

R/W

Bit 15—Reserved: This bit is always read as 0. The write value should always be 0.

Bit 14—PA15 Mode (PA15MD): Selects the function of the PA15/CK pin.

Bit 14: PA15MD

Description

General input/output (PA15)

Clock output (CK)

(Initial value)

Bit 13—Reserved: This bit is always read as 0. The write value should always be 0.

Bit 12—PA14 Mode (PA14MD): Selects the function of the PA14/

RD pin.

Bit 12: PA14MD

Description

General input/output (PA14)

(Initial value)

Read output (

RD)

Bits 11 to 9—Reserved: These bits are always read as 0. The write value should always be 0.

Bit 8—PA12 Mode (PA12MD): Selects the function of the PA12/

WRL pin.

Bit 8: PA12MD

Description

General input/output (PA12)

(Initial value)

Chip select output (

WRL)

Bit 7—Reserved: These bits are always read as 0. The write value should always be 0.

SH7018 Datasheet(PDF) 300 Page - Renesas Technology Corp

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